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semiconductor technical data mecl pll components dual modulus prescaler 116 15 14 13 12 11 10 9 2 3 4 5 6 7 8 (top view) v cco q q mttl v cc mttl output v ee v cc e5 mecl pin connections order this document by mc12009/d p suffix plastic package case 648 clock v bb e2 mecl e1 mecl e3 mecl e4 mecl ( ) ( + ) 16 1 device operating temperature range package ordering information mc12009p MC12011p t a = 35 to +85 c plastic mc12013p
these devices are twomodulus prescalers which will divide by 5 and 6, 8 and 9, and 10 and 11, respectively. a mecltomttl translator is provided to interface directly with the mc12014 counter control logic. in addition, there is a buffered clock input and mecl bias voltage source. ? mc12009 480 mhz ( 5/6), MC12011 550 mhz ( 8/9), mc12013 550 mhz ( 10/11) ? mecl to mttl translator on chip ? mecl and mttl enable inputs ? 5.0 or 5.2 v operation* ? buffered clock input e series input rc typ, 20 ohms and 4 pf ? v bb reference voltage ? 310 milliwatts (typ) * when using a 5.0 v supply, apply 5.0 v to pin 1 (v cco ), pin 6 (mttl v cc ), pin 16 (v cc ), and ground pin 8 (v ee ). when using 5.2 v supply, ground pin 1 (v cco ), pin 6 (mttl v cc ), and pin 16 (v cc ) and apply 5.2 v to pin 8 (v ee ). if the translator is not required, pin 6 may be left open to conserve dc power drain. maximum ratings characteristic symbol rating unit (ratings above which device life may be impaired) power supply voltage (v cc = 0) v ee 8.0 vdc input voltage (v cc = 0) v in 0 to v ee vdc output source current continuous surge i o 50 100 madc storage temperature range t stg 65 to +175 c (recommended maximum ratings above which performance may be degraded) operating temperature range mc12009, MC12011, mc12013 t a 30 to +85 c dc fanout (note 1) (gates and flipflops) n 70 e notes: 1. ac fanout is limited by desired system performance. 2. esd data available upon request. ? motorola, inc. 1997 rev 2
mc12009 MC12011 mc12013 2 motorola rf/if device data mc12013 mecl to mttl trans lator mttl out q2 c d v bb toggle flip flop q4 c 54 + 0.1 m f 1 k 14 q1 c d 15 c 2 3 q4 q 4 q 4 f ref lowpass filter f out phase detector mc4044 mc12009 MC12011 mc12013 a programmable counter mc4016 modulus enable line counter control logic mc12014 n p programmable counter mc4016 counter reset line zero detect line voltagecontrolled oscillator mc1648 f out recommended circuitry for ac coupled inputs. 0.1 m f MC12011 1 k 14 v bb 32 q 4q4 15 recommended circuitry for ac coupled inputs. mecl to mttl trans lator mttl out + 4 5 q 4 q2 c q4 d c toggle flip flop d c d c q1 q3 q3 d figure 1. logic diagrams mecl e1 mecl e2 mttl e4 mecl e3 mttl e5 mecl to mttl trans lator mttl out + 0.1 m f 1 k 1000 pf mc12009 4 5 q3 2 q 3 3 14 v bb 15 recommended circuitry for ac coupled inputs. c d c d q 1 q1 c dq2 q3 q 3 9 10 11 12 13 mecl e1 mecl e2 mttl e4 mecl e3 mttl e5 9 10 11 12 13 mecl e1 mecl e2 mttl e4 mecl e3 mttl e5 9 10 11 12 13 7 7 7 10 for one or all e1 thru e5 high 11 for all e1 thru e5 low tie unused gate inputs low. pulldown resistors required on pins 2, 3 when not connected to translator. basic ic capability: 10/11 clock input 1000 pf clock input 1000 pf clock input 1000 pf clock input figure 2. typical frequency synthesizer application
mc12009 MC12011 mc12013 3 motorola rf/if device data electrical characteristics (supply voltage = 5.2 v, unless otherwise noted.) pi test limits pin under 30 c +25 c +85 c characteristic symbol under test min max min max min max unit power supply drain current i cc1 8 88 80 80 madc pp y i cc2 6 5.2 5.2 5.2 madc input current i inh1 15 11 12 13 375 375 375 375 250 250 250 250 250 250 250 250 m adc i inh2 4 5 1.7 1.7 6.0 6.0 2.0 2.0 6.0 6.0 2.0 2.0 6.4 6.4 madc i inh3 5 0.7 3.0 1.0 3.0 1.0 3.6 i inh4 9 10 100 100 100 100 100 100 m adc leakage current i inl1 15 11 12 13 10 10 10 10 10 10 10 10 10 10 10 10 m adc i inl2 9 10 1.6 1.6 1.6 1.6 1.6 1.6 madc reference voltage v bb 14 1.360 1.160 vdc logic `1' output voltage v oh1 (note 1) 2 3 1.100 1.100 0.890 0.890 1.000 1.000 0.810 0.810 0.930 0.930 0.700 0.700 vdc v oh2 7 2.8 2.6 2.4 logic `0' output voltage v ol1 (note 1) 2 3 1.990 1.990 1.675 1.675 1.950 1.950 1.650 1.650 1.925 1.925 1.615 1.615 vdc v ol2 7 4.26 4.40 4.48 logic `1' threshold voltage v oha (note 2) 2 3 1.120 1.120 1.020 1.020 0.950 0.950 vdc logic `0' threshold voltage v ola (note 3) 2 3 1.655 1.655 1.630 1.630 1.595 1.595 vdc short circuit current i os 7 65 20 65 20 65 20 madc 1. test outputs of the device must be tested by sequencing through the truth table. all input, power supply and ground voltages must be maintained between tests. the clock input is the waveform shown. 2. in addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. the clock input is the waveform shown. 3. in addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. the clock input is the waveform shown. each mecl 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. outputs are terminated through a 50 w resistor to 2.0 v. test procedures are shown for only one gate. the other gates are tested in the same manner. v ihmax v ilmin clock input
mc12009 MC12011 mc12013 4 motorola rf/if device data electrical characteristics (supply voltage = 5.2 v, unless otherwise noted.) (continued) test voltage/current values volts @ test temperature v ihmax v ilmin v ihamin v ilamax v ih v ilh 30 c 0.890 1.990 1.205 1.500 2.8 4.7 +25 c 0.810 1.950 1.105 1.475 2.8 4.7 +85 c 0.700 1.925 1.035 1.440 2.8 4.7 pin under test voltage applied to pins listed below gd characteristic symbol u n d er test v ihmax v ilmin v ihamin v ilamax v ih v il gnd power supply drain current i cc1 8 1,16 i cc2 6 4 5 6 input current i inh1 15 11 12 13 15 11 12 13 1,16 1,16 1,16 1,16 i inh2 4 5 5 5 4 4 6 6 i inh3 5 4 5 6 i inh4 9 10 9 10 1,16 1,16 leakage current i inl1 15 11 12 13 1,16 1,16 1,16 1,16 i inl2 9 10 9 10 1,16 1,16 reference voltage v bb 14 1,16 logic `1' output voltage v oh1 (note 1.) 2 3 11,12,13 11,12,13 9,10 9,10 1,16 1,16 v oh2 7 5 4 6 logic `0' output voltage v ol1 (note 1.) 2 3 11,12,13 11,12,13 9,10 9,10 1,16 1,16 v ol2 7 4 5 6 logic `1' threshold voltage v oha (note 2.) 2 3 11,12,13 11,12,13 1,16 1,16 logic `0' threshold voltage v ola (note 3.) 2 3 11,12,13 11,12,13 1,16 1,16 short circuit current i os 7 5 4 7 6 1. test outputs of the device must be tested by sequencing through the truth table. all input, power supply and ground voltages must be maintained between tests. the clock input is the waveform shown. 2. in addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. the clock input is the waveform shown. 3. in addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. the clock input is the waveform shown. v ihmax v ilmin clock input
mc12009 MC12011 mc12013 5 motorola rf/if device data electrical characteristics (supply voltage = 5.2 v, unless otherwise noted.) (continued) test voltage/current values volts ma @ test temperature v iht v ilt v ee i l i ol i oh 30 c 3.2 4.4 5.2 0.25 16 0.40 +25 c 3.2 4.4 5.2 0.25 16 0.40 +85 c 3.2 4.4 5.2 0.25 16 0.40 pin under test voltage applied to pins listed below gd characteristic symbol u n d er test v iht v ilt v ee i l i ol i oh gnd power supply drain current i cc1 8 8 1,16 i cc2 6 8 6 input current i inh1 15 11 12 13 9,10 9,10 9,10 8 8 8 8 1,16 1,16 1,16 1,16 i inh2 4 5 8 8 6 6 i inh3 5 8 6 i inh4 9 10 8 8 1,16 1,16 leakage current i inl1 15 11 12 13 8,15 8,11 8,12 8,13 1,16 1,16 1,16 1,16 i inl2 9 10 8 8 1,16 1,16 reference voltage v bb 14 8 14 1,16 logic `1' output voltage v oh1 (note 1.) 2 3 8 8 1,16 1,16 v oh2 7 8 7 6 logic `0' output voltage v ol1 (note 1.) 2 3 8 8 1,16 1,16 v ol2 7 8 7 6 logic `1' threshold voltage v oha (note 2.) 2 3 9,10 9,10 8 8 1,16 1,16 logic `0' threshold voltage v ola (note 3.) 2 3 9,10 9,10 8 8 1,16 1,16 short circuit current i os 7 8 6 1. test outputs of the device must be tested by sequencing through the truth table. all input, power supply and ground voltages must be maintained between tests. the clock input is the waveform shown. 2. in addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. the clock input is the waveform shown. 3. in addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. the clock input is the waveform shown. v ihmax v ilmin clock input
mc12009 MC12011 mc12013 6 motorola rf/if device data electrical characteristics (supply voltage = 5.0 v, unless otherwise noted.) pi test limits pin under 30 c +25 c +85 c characteristic symbol under test min max min max min max unit power supply drain current i cc1 8 88 80 80 madc pp y i cc2 6 5.2 5.2 5.2 madc input current i inh1 15 11 12 13 375 375 375 375 250 250 250 250 250 250 250 250 m adc i inh2 4 5 1.7 1.7 6.0 6.0 2.0 2.0 6.0 6.0 2.0 2.0 6.4 6.4 madc i inh3 5 0.7 3.0 1.0 3.0 1.0 3.6 i inh4 9 10 100 100 100 100 100 100 m adc leakage current i inl1 15 11 12 13 10 10 10 10 10 10 10 10 10 10 10 10 m adc i inl2 9 10 1.6 1.6 1.6 1.6 1.6 1.6 madc reference voltage v bb 14 3.67 3.87 vdc logic `1' output voltage v oh1 (note 4.) 2 3 3.900 3.900 4.110 4.110 4.000 4.000 4.190 4.190 4.070 4.070 4.300 4.300 vdc v oh2 7 2.4 2.6 2.8 logic `0' output voltage v ol1 (note 4.) 2 3 3.070 3.070 3.385 3.385 3.110 3.110 3.410 3.410 3.135 3.135 3.445 3.445 vdc v ol2 7 0.94 0.80 0.72 logic `1' threshold voltage v oha (note 5.) 2 3 3.880 3.880 3.980 3.980 4.050 4.050 vdc logic `0' threshold voltage v ola (note 6.) 2 3 3.405 3.405 3.430 3.430 3.465 3.465 vdc short circuit current i os 7 65 20 65 20 65 20 madc 4. test outputs of the device must be tested by sequencing through the truth table. all input, power supply and ground voltages must be maintained between tests. the clock input is the waveform shown. 5. in addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. the clock input is the waveform shown. 6. in addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. the clock input is the waveform shown. each mecl 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. outputs are terminated through a 50 w resistor to 2.0 v. test procedures are shown for only one gate. the other gates are tested in the same manner. v ihmax v ilmin clock input
mc12009 MC12011 mc12013 7 motorola rf/if device data electrical characteristics (supply voltage = 5.0 v, unless otherwise noted.) (continued) test voltage/current values volts @ test temperature v ihmax v ilmin v ihamin v ilamax v ih v ilh 30 c +4.110 +3.070 +3.795 +3.500 +2.4 +0.5 +25 c +4.190 +3.110 +3.895 +3.525 +2.4 +0.5 +85 c +4.300 +3.135 +3.965 +3.560 +2.4 +0.5 pin under test voltage applied to pins listed below (v ee ) characteristic symbol u n d er test v ihmax v ilmin v ihamin v ilamax v ih v il (v ee ) gnd power supply drain current i cc1 8 8 i cc2 6 4 5 8 input current i inh1 15 11 12 13 15 11 12 13 8 8 8 8 i inh2 4 5 5 5 4 4 8 8 i inh3 5 4 5 8 i inh4 9 10 9 10 8 8 leakage current i inl1 15 11 12 13 8,15 8,11 8,12 8,13 i inl2 9 10 9 10 8 8 reference voltage v bb 14 8 logic `1' output voltage v oh1 (note 4.) 2 3 11,12,13 11,12,13 9,10 9,10 8 8 v oh2 7 5 4 8 logic `0' output voltage v ol1 (note 4.) 2 3 11,12,13 11,12,13 9,10 9,10 8 8 v ol2 7 4 5 8 logic `1' threshold voltage v oha (note 5.) 2 3 11,12,13 11,12,13 8 8 logic `0' threshold voltage v ola (note 6.) 2 3 11,12,13 11,12,13 8 8 short circuit current i os 7 5 4 7 8 4. test outputs of the device must be tested by sequencing through the truth table. all input, power supply and ground voltages must be maintained between tests. the clock input is the waveform shown. 5. in addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. the clock input is the waveform shown. 6. in addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. the clock input is the waveform shown. v ihmax v ilmin clock input
mc12009 MC12011 mc12013 8 motorola rf/if device data electrical characteristics (supply voltage = 5.0 v, unless otherwise noted.) (continued) test voltage/current values volts ma @ test temperature v iht v ilt v cc i l i ol i oh 30 c +2.0 +0.8 +5.0 0.25 16 0.40 +25 c +2.0 +0.8 +5.0 0.25 16 0.40 +85 c +2.0 +0.8 +5.0 0.25 16 0.40 pin under test voltage applied to pins listed below (v ee ) characteristic symbol u n d er test v iht v ilt v cc i l i ol i oh (v ee ) gnd power supply drain current i cc1 8 1,16 8 i cc2 6 6 8 input current i inh1 15 11 12 13 9,10 9,10 9,10 1,16 1,16 1,16 1,16 8 8 8 8 i inh2 4 5 6 6 8 8 i inh3 5 6 8 i inh4 9 10 1,16 1,16 8 8 leakage current i inl1 15 11 12 13 1,16 1,16 1,16 1,16 8,15 8,11 8,12 8,13 i inl2 9 10 1,16 1,16 8 8 reference voltage v bb 14 1,16 14 8 logic `1' output voltage v oh1 (note 4.) 2 3 1,16 1,16 8 8 v oh2 7 6 7 8 logic `0' output voltage v ol1 (note 4.) 2 3 1,16 1,16 8 8 v ol2 7 6 7 8 logic `1' threshold voltage v oha (note 5.) 2 3 9,10 9,10 1,16 1,16 8 8 logic `0' threshold voltage v ola (note 6.) 2 3 9,10 9,10 1,16 1,16 8 8 short circuit current i os 7 6 8 4. test outputs of the device must be tested by sequencing through the truth table. all input, power supply and ground voltages must be maintained between tests. the clock input is the waveform shown. 5. in addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. the clock input is the waveform shown. 6. in addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. the clock input is the waveform shown. v ihmax v ilmin clock input
mc12009 MC12011 mc12013 9 motorola rf/if device data switching characteristics ch t i ti sbl pin mc12009, MC12011, mc12013 test voltages / waveforms applied to pins listed below: ch t i ti sbl pin under 30 c +25 c +85 c uit pulse pulse pulse v ihmin v ilmin v f v ee v cc characteristic symbol under test min typ max min typ max min typ max unit pulse gen.1 pulse gen.2 pulse gen.3 v ihm i n v ilm i n v f 3.0 v v ee 3.0 v v cc +2.0 propagation delay (see figures 3 and 5) t 15+ 2+ t 15+ 2 t 5+ 7+ t 5 7 2 2 7 7 e e e e e e e e 8.1 7.5 8.4 6.5 e e e e e e e e 8.1 7.5 8.1 6.5 e e e e e e e e 8.9 8 2 8.9 7.1 ns 15 15 a a e e e e e e e e e e e e 11,12,13 11,12,13 e e 9,10 9,10 e e 8 8 8 8 1,6,16 1,6,16 1,6,16 1,6,16 setup time (see figures 4 and 5) t setup1 t setup2 11 9 5.0 5.0 e e e e 5.0 5.0 e e e e 5.0 5.0 e e e e ns ns 15 15 * e e * e e * 11,12,13 9,10 * 8 8 1,6,16 1,6,16 release time (see figures 4 and 5) t rel1 t rel2 11 9 5.0 5.0 e e e e 5.0 5.0 e e e e 5.0 5.0 e e e e ns ns 15 15 * e e * e e * 11,12,13 9.10 * 8 8 1,6,16 1,6,16 toggle frequency (see figure 6) mc12009 : 5/6 MC12011 : 8/9 mc12013 : 10/11 f max 2 440 500 500 e e e e e e 480 550 550 e e e e e e 440 500 500 e e e e e e mhz e e e e e e e e e 11 11 11 e e e e e e 8 8 8 16 16 16 *test inputs sequentially, with pulse generator 2 or 3 as indicated connected to input under test, and the voltage indicated applied to the other input(s) of the same type ( i.e., mecl or mttl). v 30 c +25 c +85 c v ihmin + 1.03 + 1.115 + 1.20 vdc v ilmin + 0.175 + 0.200 + 0.235 vdc figure 3. ac voltage waveforms mttl out +in q (pin 3) q (pin 2) v ilmin v ihmin 1.5 v t+ t++ 20% 80% 50% 50% 50% 50% t t++ pulse generator 1 pulse generator 3 divide by 5 e mc12009 divide by 8 e MC12011 divide by 10 e mc12013 divide by 6 e mc12009 divide by 9 e MC12011 divide by 11 e mc12013 t setup1 t setup2 +1.5 v 50 % 50% 50% 80% 80% 80% 80% 20% 20% 20% 20% 90% 90% 10% 10% t rel2 1.5 v v ihmin v ilmin v ihmin v ilmin 0 v v ee t rel1 50% pulse generator 1 pulse generator 2 q (pin 2) figure 4. setup and release time waveforms pulse generator 3 pulse generator 1 pulse generator 2 q (pin 2) v ihmin v ilmin v ihmin v ilmin 0 v v ee
mc12009 MC12011 mc12013 10 motorola rf/if device data all pulse generators are eh 137 or equiv. pulse generators 1 and 2: prf = 10 mhz pw = 50% duty cycle t + = t = 2.0 0.2 ns pulse generator 3: prf = 2.0 mhz pw = 50% duty cycle t + = t = 5.0 0.5 ns all resistors are + 1%. all input and output cables to the scope are equal lengths of 50ohm coaxial cable. the 1950ohm resistor at pin 7 and the scope termination impedance constitute a 40 : 1 attenuator probe. c t = 15 pf = total parasitic capacitance which includes probe, wiring, and load capacitance. unused output connected to a 50ohm resistor to ground. v in 50 100 v in pulse generator #1 pulse generator #2 pulse generator #3 a mc10109 or equiv. (scope channel a) 50 950 v cc = +2.0 v 25 m f 13 12 11 10 9 15 14 5 4 0.1 m f + v ee = 3.0 v 8 mecl to mttl trans lator v bb c e5 e4 e3 e2 e1 16 16 0.1 m f 2 3 7 v ee = 3.0 v c t 1950 v out v out (scope channel b) q q 50 100 v in 50 v in v out figure 5. ac test circuit
mc12009 MC12011 mc12013 11 motorola rf/if device data figure 6. maximum frequency test circuit 1 k sine wave input (to scope) v in v ee 0.1 m f 0.1 m f 0.1 m f 0.1 m f 5.0 m f 13 12 11 10 9 15 14 v ee = 3.0 v 8 v bb c e5 e4 e3 e2 e1 116 v cc = +2.0 v v out to scope 2 3 q q unused output connected to a 50 w resistor to ground divide by 6 800 mv clock input q (pin 2) 3 cycles 3 cycles 850 mv typ divide by 9 800 mv 850 mv typ 5 cycles 4 cycles divide by 11 800 mv 850 mv typ 5 cycles 6 cycles clock input q (pin 2) clock input q (pin 2)
enable = 0 enable = 1 enable = 1 enable = 0 enable = 0 enable = 1 111 011 001 010 101 110 100 000 0101 0010 1000 1100 1010 1110 0110 0000 0111 1111 0001 1101 1001 0011 1011 0100 1110 0110 1101 1001 0001 0011 0111 0100 0101 1011 1010 1111 1100 1000 0000 0010 figure 7. state diagram divide by 8/9 (MC12011) divide by 5/6 (mc12009/mc12509) divide by 10/11 (mc12013) enable = 1 enable = 1. notes: the state of the enable is important only for the positive clock transition when the counter is in state 1100. enable = 1. mc12009 MC12011 mc12013 12 motorola rf/if device data q1 q2 q3 1 1 1 0 1 1 0 0 1 0 0 0 1 0 0 1 1 0 q1 q2 q3 q4 1 1 1 1 0 1 1 1 0 0 1 1 1 0 0 1 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 0 1 1 0 0 q1 q2 q3 q4 1 1 1 1 0 1 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 1 0 0
enable = 1 enable = 0 13 12 11 10 9 15 5 4 + c e5 e4 e3 e2 e1 q4 q 4 2 3 7 mecl to mttl trans lator figure 8. divide by 10/11 (mc12013) applications information the primary application of these devices is as a highspeed variable modulus prescaler in the divide by n section of a phaselocked loop synthesizer used as the local oscillator of twoway radios. proper vhf termination techniques should be followed when the clock is separated from the prescaler by any appreciable distance. in their basic form, these devices will divide by 5/6, 8/9, or 10/11. division by 5, 8, or 10 occurs when any one or all of the five gate inputs e1 through e5 are high. division by 6, 9, or 11 occurs when all inputs e1 through e5 are low. (unconnected mttl inputs are normally high, uncon- nected mecl inputs are normally low). with the addition of extra parts, many different division configurations may be obtained (20/21, 40/41, 50/51, 100/101, etc.) a few of the many configurations are shown below, only for the mc12013. mc12009 MC12011 mc12013 13 motorola rf/if device data q1 q2 q3 q4 1 1 1 1 0 1 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 1 0 0
figure 9. divide by 20/21 (mc12013) 13 12 10 15 + c e5 e4 e3 e2 e1 q4 q 4 2 3 7 mecl to mttl trans lator e2 + e3 + e4 + e5 = 0 e2 + e3 + e4 + e5 = 1 to obtain an mttl output, connect pins 5 and 4 to pins 2 and 3 respectively. termination resistors for the mecl outputs are not shown, but are required except for the flipflop driving the translator section. the 20/21 counter may also be built using an mttl flipflop by connecting pins 5 and 4 to pins 2 and 3 respectively, and driving the mttl flipflop with pin 7. mc12013 inputs e4 and e5 are used rather than e1. with e1 + e2 + e3 = 0, operation remains as shown. q5 d c q q 1/2 mc10131 11 9 5 4 figure 10. divide by 40 / 41 (mc12013) 13 12 11 10 9 15 5 4 + c e5 e4 e3 e2 e1 q4 q 4 2 3 7 mecl to mttl trans lator d c q q for 40 : e4 + e5 = 1 for 41 : e4 + e5 = 0 termination resistors for mecl outputs are not shown, but are required except for the flipflop driving the translator section. d c q q mc10131 mc12009 MC12011 mc12013 14 motorola rf/if device data count q1 q2 q3 q4 q4 31 1 1 1 1 1 30 0 1 1 1 1 28 0 0 1 1 1 24 0 0 0 1 1 25 1 0 0 1 1 27 1 1 0 1 1 22 0 1 1 0 1 20 0 0 1 0 1 16 0 0 0 0 1 17 1 0 0 0 1 19 1 1 0 0 1 14 0 1 1 1 0 12 0 0 1 1 0 8 0 0 0 1 0 9 1 0 0 1 0 11 1 1 0 1 0 6 0 1 1 0 0 4 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 3 1 1 0 0 0
mc12009 MC12011 mc12013 15 motorola rf/if device data p suffix plastic package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 outline dimensions motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. mfax is a trademark of motorola, inc. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.: spd, strategic planning office, 141, p.o. box 5405, denver, colorado 80217. 13036752140 or 18004412447 4321 nishigotanda, shagawaku, tokyo, japan. 0354878488 customer focus center: 18005216274 mfax ? : rmfax0@email.sps.mot.com touchtone 1 6022446609 asia / pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, motorola fax back system us & canada only 18007741848 51 ting kok road, tai po, n.t., hong kong. 85226629298 http://sps.motorola.com/mfax/ home page : http://motorola.com/sps/ 12009/d ?

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